AnalogTalk

Ceramic capacitors offer low cost, small size, and can offer improved reliability over tantalum and aluminum capacitors. The ultra-low ESR attribute of ceramic capacitors, however, does effect choice of LDO when used at the output as most older LDOs require the ESR of a capacitor on its output for loop stability.  Although almost all newer designs include loop compensation so that they can be used with ceramic capacitors,  there’s still hope for ones favorite older workhorse LDO (or dirt cheap).  Simply add a small resistance in series with desired ceramic capacitor.

The region of stability is shown in the graph above (in this case for a TC1017).  Any decent datasheet will provide this graph.  Selecting the lowest value for the ESR, while keeping in mind resistor tolerance, is best to minimize load transients.

Figure 1 Region of Stability of ESR vs Load Current

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LDOs

A nice addition to Microchip’s LDO line, which once suffered from a lack of high voltage output LDOs.   The MCP1804 is a 28V, 150 mA LDO family.  The wide input operating voltage range allows the MCP1804 LDO to be used with standard 12V and 24V power rails, and it’s wide output voltage range, available from 1.8V to 18V, provides greater design flexibility. The MCP1804 LDO is ceramic capacitor stable down to the low value of 0.1 μF, allowing for smaller sized ceramic capacitors.  This helps to reduce space and cost.  Available packages include 3-pin SOT-89 and SOT-223, as well as 5-pin SOT-23 and SOT-89, which feature a shutdown pin to lower current consumption to just 0.01 microamperes.

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MCP1804

Thermal Resistance

Heat flows from a high temperature (T1) to a relatively lower one (T2) at a rate determined by the thermal resistance (Θ12) between the two points (see Figure 1).
Figure 1 Thermal Resistance

The thermal resistance is the temperature rise (in °C) for every watt dissipated for the system in question. Therefore, the expression in Equation 1 and Equation 2:

Equation 1: T1 – T2 = PD x Θ12

Equation 2: Θ12 = (T1 – T2)/PD

(Where: T1 = Temperature of Point 1, T2 = Temperature of Point 2, PD = Power dissipated in the device)
Relating this model to an IC, we can say that the device’s thermal resistance from junction to ambient (ΘJA) is equal to the junction temperature minus ambient, divided by power dissipation, or as expressed in Equation 3.

Equation 3: ΘJA = (TJ – TA)/PD

The device junction temperature can be expressed as a function of power dissipation and thermal resistance by Equation 4.

Equation 4: TJ = (ΘJA x PD) + TA

Heat is transferred from the die (heat source) to the air, through several material interfaces. The thermal resistance between these interfaces comprise the ΘJA of the system. These interfaces are typically the die-to-package (ΘJC), package-to-heat sink (ΘCS), and heat sink-to-air (ΘSA) (see Figure 2).

Figure 2 Heat transfer

The thermal resistance can now be written as shown in Equation 5.

Equation 5: ΘJA = ΘJC + ΘCS + ΘSA

Equation 6 shows the equation for thermal resistance from junction to case if No Heat Sink is used.  We will use this case for the following example.

Equation 6: ΘJA = °C/W

Example 1:
In Part 1 of this series we discussed the power dissipation in the MCP1700, a low power quality LDO from Microchip Technology, who is a leader in Analog!  :)  The MCP1700 is available in 3 package options but we will continue to use SOT23-3 for this example.
The MCP1700 (250mA in a SOT23-3 package) is being used to regulate a 5V supply down to 3V.  The ΘJA for a SOT23-3 package is 308°C/W.  (Maximum junction temperature = 150°C)
From Part I of this post we learned PDmax = 0.35W and TAmax = 70°C
We can calculate the junction temperature under these conditions by using Equation 4.

TJ = (ΘJA x PD) + TA
TJ = (308°C/Wx0.35W) + 70°C
TJ = 177°C

This junction temperature is above the maximum limit.  The highest power dissipation allowable in this case is:
PDmax = (TJA - TJAmax)/ΘJA
PDmax = (150°C - 70°C)/308°C/W
PDmax = .26W

This example shows how critical thermal considerations are in designing your system.  Due to the high ΘJA, the designer should consider keeping the system operating temperature lower through cooling techniques or select a more thermally capable package.  The MCP1700 is also available in a TO92 and SOT89 packages, which have much better thermal characteristics.
Thanks for keeping up with our blog…..please drop by again soon!

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MCP1700

LDO POWER DISSIPATION

Determining the power dissipated by an LDO involves a straight forward calculation. The current entering the LDO can only go two places: through the pass device to the output (IOUT); or through the internal bias circuitry to ground (IGND). See Figure 1.

The conservation of power, states that power in must equal power out. Consequently, input power is equal to the power delivered to the load plus the power dissipated in the LDO, (Equation 1):

Equation 1: PIN = POUT + PLDO
The power dissipation of the LDO is expressed in Equation 2:

Equation 2: PD = (VIN – VOUT) x ILOAD + VIN x IGND

When calculating power dissipation, it is critical that worst case conditions be used. This means maximum VIN, ILOAD, and IGND, and minimum VOUT values. Equation 2 is more accurately written as Equation 3.

Equation 3: PDMAX = (VINMAX – VOUTMIN) x ILOADMAX + VINMAX x IGNDMAX

EXAMPLE 1:
The MCP1700 3.0V (250 mA LDO, low Iq LDO in a SOT23-3 package) is being used to regulate a 5V supply down to 3.0V. The 5V supply is specified to have an output tolerance of ±5%. The maximum load on the 3.0V supply is 150 mA. The system operating temperature range is from 20°C to 70°C.

Given:
Maximum supply current = 35 μA
VINMAX = (5V x 1.05) = 5.25V
VOUTMIN = 2.91V

Therefore,

Equation 4: PDMAX = (5.25V – 2.91V) x 150 mA + 5.25V x 35 μA = 0.35 W

to be continued…

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MCP1700